Uncubed
           

Intern — FPGA Engineer (Fall 2020, Winter/Spring 2021)

Astranis, San Francisco, CA

Building the future of telecommunications satellites.


U.S. CITIZENSHIP OR GREEN CARD REQUIRED
(Note: This is due to U.S. export regulations, and we are unable to make exceptions.)

Four billion people do not have access to the internet. Astranis is going to change that. We are building the next generation of smaller, lower-cost telecommunications satellites to bring the world online. 

Come work with incredibly smart people who have flown things in space before. No prior space experience needed, you just need to enjoy getting your hands dirty with real hardware and be okay with struggling to do things that seem impossibly hard.

We’re a well-funded team of over 100 world-class engineers that move fast. We raised our Series B ($90M) from Andreessen Horowitz and Venrock, launched our first satellite in 2018, secured our first major customer deal in 2019, and we’ll triple the satellite internet capacity of Alaska in 2021. 

Our mission and our products are meant to connect the world and everyone in it, regardless of gender, race, creed, or any other distinction. We believe in a diverse and inclusive workplace, and we encourage all people to join our team and bring their unique perspective to help make us stronger.

Role

  • RTL Development for FPGA targeted applications
  • Work with multiple FPGAs and toolchains
  • Interface FPGAs with a variety of peripherals including high speed data converters, memories, MCUs
  • Write software to interface and test RTL in hardware
  • Collaborate closely with electrical and software engineers

Requirements

  • US Citizenship or Green Card (This is a legal requirement; no exceptions)
  • Currently pursuing a B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent
  • A passion for hardware development, including working in a fast-paced environment and hands-on design and development
  • Experience in designing, implementing, and testing high throughput systems implemented on FPGAs
  • Proficiency with Verilog/SystemVerilog for synthesis
  • Don't meet them all? Not a problem. Please apply even if you do not meet all these criteria.

Bonus

  • Experience with UVM and advanced SystemVerilog verification
  • Experience with Xilinx FPGAs
  • Experience with Vivado IDE, TCL
  • Familiarity with system level estimates and implications of power, thermal, and real estate
  • Experience with high speed data converters (ADCs, DACs, JESD204B)
  • Experience with circuit level debugging
  • Experience with digital communication theory and implementation, such as LDPC implementations
  • Experience with space-based systems
  • Experience with modern communication systems (RF, IF/IQ, time/freq domains, modulation)
  • Experience in at least 1 domain beyond logic design. This could be DSP/radio design, software, hi-rel design (e.g. fault analysis & recover), etc.

Availabilities for Fall 2020 (ASAP), Winter, Spring, and Summer 2021

About Astranis

We are taking on one of humanity's most important challenges.

Four billion people do not have access to the internet. Astranis is going to change that.
We are building the next generation of smaller, lower-cost telecommunications satellites to bring the world online.

Join us and work with top engineers who have flown things in space before.
We are a well-funded team that moves fast.

Astranis

Want to learn more about Astranis? Visit Astranis's website.